Job description
Senior / Staff Verification Engineer
Salary: Up to 110,000 (D.O.E.)
Location: Cambridge
Working Environment: Hybrid (2 days on-site)
The company is one of the most prestigious tech firms in the world and a global powerhouse in the semiconductor industry, operating at the bleeding edge of technology and redefining the way we interact with our devices through the creation of advanced semiconductor and software designs.
Following continued growth, the business has multiple openings for Senior and Staff level Verification Engineers to join their FPGA Prototyping Team within the Solutions Engineering Group.
As a Verification Engineer, you focus will be on driving the verification of SoC RTL designs that are modified for FPGA implementation, developing and maintaining SoC verification testbenches, writing testcases, creating test-plans and developing tools for automation tasks. Furthermore, you will also have opportunity to gain exposure to the other areas of the design cycle.
Key Requirements
Desired, but not essential:
Salary: Up to 110,000 (D.O.E.)
Location: Cambridge
Working Environment: Hybrid (2 days on-site)
The company is one of the most prestigious tech firms in the world and a global powerhouse in the semiconductor industry, operating at the bleeding edge of technology and redefining the way we interact with our devices through the creation of advanced semiconductor and software designs.
Following continued growth, the business has multiple openings for Senior and Staff level Verification Engineers to join their FPGA Prototyping Team within the Solutions Engineering Group.
As a Verification Engineer, you focus will be on driving the verification of SoC RTL designs that are modified for FPGA implementation, developing and maintaining SoC verification testbenches, writing testcases, creating test-plans and developing tools for automation tasks. Furthermore, you will also have opportunity to gain exposure to the other areas of the design cycle.
Key Requirements
- Experience working on the verification of SoC, IP or FPGA designs.
- Strong understanding of verification flows, hardware description and verification languages.
- Strong command of C and automation experience with Tcl, Python or other scripting languages.
Desired, but not essential:
- Knowledge of SoC verification flow and strategy.
- Experience with verification methodologies – UVM / OVM.